In semiconductor applications, dummy fill shapes may be included in a semiconductor design to improve uniformity of shapes across the design. In semiconductor designs, a majority of design features may include dummy fill shapes. Uniform local shapes and densities facilitate manufacturing processes, such as, for example, Chemical Mechanical Polishing (CMP). To enable robust photolithographic rendering, small dummy shapes may require processing for optical proximity correction (OPC) and optical rules checking (ORC) before the shapes are rendered on a lithography mask and printed in a photoresist on a wafer.
For advanced semiconductor technologies, if a periodicity (i.e., a width of a feature plus a space between features) required for dummy fill shapes of a semiconductor design is small and/or similar to a pitch for other design features, the dummy shapes may not be robustly rendered in a photoresist when corresponding features on the lithography mask include simply desired or “target” shapes. For example, shapes which are isolated (e.g., separated) from other shapes tend to print differently (e.g., be smaller in size) than shapes which are nested or semi-nested (e.g., closely placed) to each other. This effect can be counteracted by OPC operations, which make use of complex mathematical models for optical effects in semiconductor patterning, and apply corrections to dummy fill shapes, such that the “corrected” shapes will be rendered close to desired (target) dimensions in the photoresist on the semiconductor wafer. The need for OPC is more prevalent for small design shapes in advanced semiconductor technologies. However, OPCs may be time consuming and expensive to perform. While OPCs may be an unavoidable expense for the design features that make up functional circuitry in a semiconductor design, it is an undesirable burden for dummy fill shapes.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.